TECH NEWS – Following the head of SK Hynix, another company believes that the next year or so could become extremely challenging. Apacer’s CEO predicts a dramatic decline in the supply of conventional DRAM during 2027.
Apparently, nothing is quite as devastating as a rejected DRAM chip. As high-bandwidth memory continues to consume DDR wafer capacity, DRAM supply could decline by as much as 70% in 2027, according to Apacer’s CEO. C. K. Chang predicts that DRAM manufacturers may bring only 30% of their 2026 production volume to market next year, potentially creating a 70% year-over-year supply reduction. This aligns with recent comments from SK Hynix CEO Kwak Noh-jung, who warned that even more difficult conditions would follow the memory disruptions already experienced and suggested that 2027 could become the worst year in the industry’s history for supply. The Business Times recently reported that the supply of silicon wafers for memory products is expected to grow by approximately 12% annually in 2027 and 2028, but HBM could consume around half of that capacity.
Samsung is therefore expected to ship approximately 12 billion GB of HBM in 2026 before increasing the figure to 20 billion GB in 2027. SK Hynix, meanwhile, is projected to ship 18 billion GB in 2026 and 24 billion GB in 2027. Consequently, growth in non-HBM DRAM bits could be limited to an annual rate of 15% during 2027 and 2028, while demand is expected to increase by 22%. To illustrate the planned capacity expansion, Samsung’s P5 Fab 1 facility is scheduled to begin operating in July 2027, while P5 Fab 2 and another facility in Yongin are expected to start production by 2029. SK Hynix’s Yongin Y1 factory is due to begin operating in February 2027, followed by Y2 during the second half of 2028.
In its latest earnings report, SK Hynix indicated that it expects further growth in memory demand not only for HBM, AI, and computing workloads, but also for server DRAM intended to support agentic AI and for high-performance, high-capacity NAND. These products are meant to accommodate the expansion of AI services and the rapid growth of data volumes. The only meaningful relief for the consumer electronics industry may come from the commercial introduction of CXMT’s 3D DRAM technology, which vertically stacks memory cells to increase capacity instead of concentrating on etching ever-smaller horizontal features with EUV equipment.
This approach maximizes raw bit density without requiring further reductions in the size of horizontal manufacturing nodes. At the same time, it could substantially increase available storage capacity.




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